[d | an-b-bro-fr-gf-hr-l-m-maid-med-mi-mu-ne-o-old_o-p-ph-r-s-sci-sp-t-tran-tv-w-x | bg-vg | au-mo-tr | a-aa-abe-azu-c-dn-fi-hau-jp-ls-ma-me-rm-sos-tan-to-vn | misc-tenma-vndev | dev-stat]
[Burichan] [Futaba] [Gurochan] [Tomorrow] [Архив-Каталог-RSS] [Главная]

Файл: image.jpeg -(516 KB, 1066x1600, image.jpeg)
516 No.204823  

Hi guys, I have MYIR xilinx board (zynq) and I want to request some tutorials or user guides with examples. I have experience in the vhdl, verilog and system verilog, but I am a newcomer to the xilinx SDK and block design and the other thing like these. Help pls!




[d | an-b-bro-fr-gf-hr-l-m-maid-med-mi-mu-ne-o-old_o-p-ph-r-s-sci-sp-t-tran-tv-w-x | bg-vg | au-mo-tr | a-aa-abe-azu-c-dn-fi-hau-jp-ls-ma-me-rm-sos-tan-to-vn | misc-tenma-vndev | dev-stat]
[Burichan] [Futaba] [Gurochan] [Tomorrow] [Архив-Каталог-RSS] [Главная]